1. Field of the Invention
The present invention relates to structures and methods for decoding variable length codes, and in particular relates to structures and methods for decoding Huffman codes in data compression and decompression applications.
2. Discussion of Related Art
Huffman codes or codewords are space-efficient variable length binary representations of data. An example of Huffman code use is found in the "JPEG Digital Compression and coding of Continuous-tone Still Images, Draft ISO 10918, 1991" by the Joint Picture Expert Group (JPEG) of the ANSI X3L2.8 committee. In Annex C of the above JPEG Document, JPEG specifies a particular way to generate Huffman code tables for use with entropy encoding of still pictures. Various circuits have been developed to decode Huffman codes. In general, these circuits either decode a Huffman code iteratively using sequential logic (i.e. one or two bits at a time, until the last bit of the code is recognized), or in parallel (i.e. decode the entire code in one clock period) using combinatorial logic. The latter method of decoding Huffman codes is known as "fast decoding."
One method in the prior art for fast decoding Huffman codes is illustrated in FIG. 1. As shown in FIG. 1, a circuit 100 is provided with an alignment buffer 101, a content-addressable memory (CAM) 102 and a random access memory (RAM) 103. The alignment buffer 101 receives a set of bits containing at least one Huffman code of length L, which lies anywhere within the W-bit input word (L&lt;W) on the terminals of bus 104. The width W of the alignment buffer 101's input word is the maximum width for which a Huffman codeword may be received by this circuit 100. Upon receiving the Huffman codeword, the alignment buffer 101 provides an output word at its output bus 105. This output word on bus 105 is the input Huffman codeword shifted such that the first bit of the Huffman code is aligned to be the first bit of the output word on bus 105 from alignment buffer 101 The memory location in CAM 102, which is addressed by the W bits on the bus 105, contains an n-bit address. This n-bit address is then used on bus 106 to address RAM 103. The size of RAM 103 is determined by the number of accepted Huffman codewords, which is between 2.sup.n-1 and 2.sup.n in this example, where n is an integer representing the number of bits in each address in RAM 103. The word in RAM 103 corresponding to the n-bit address on bus 106 contains both the length L and the decoded value of the Huffman code. The length L of the Huffman code thus decoded can then be fed back on the bus 107 to the alignment buffer 101 for aligning the next Huffman code contained in the input word on bus 104.
The approach taken by the prior art, e.g. in circuit 100 of FIG. 1, depends on the availability of an efficiently implemented CAM. CAMs are not readily available in some technologies. Without using a CAM, in order to achieve fast decoding, all the bits of a Huffman codeword would have to be used to address a RAM. The size of such a RAM is impractical and enormous.